Complementary metal oxide semiconductor (CMOS) structures ordinarily employ bipolar transistors that are made up of elements that are commonly regarded as parasitic because the various elements are intended for other functions. Typically one such element is dedicated to the substrate portion of the structure. For example in the so-called P well CMOS a P type well acts as a transistor base with an N channel MOS transistor source acting as the emitter. The collector is the CMOS N type wafer substrate. This produces a vertical NPN bipolar transistor. While the performance of such transistors is useful they are parasitic and not under primary process control. The dedicated collector terminal seriously limits the circuit configurations. It would be much more desirable to have a fully isolated three terminal transistor. Furthermore, it would be desirable in logic circuits to be able to employ oxide isolation and to make a Schottky clamped transistor for high speed switching as is found in the well-known advanced low-power Schottky (ALS) devices.